Recognition


Accomplishments

    • ASEM DUO-Belgium/Wallonia-Brussels mobility fellowship 2022-23
      • Panellist at Vaishwik Bharatiya Vaigyanik Summit (VAIBHAV) summit organized by Government of India for the technology vertical of Electronics and Semiconductors Technologies in October 2020
        • Core committee member of DRiving Innovation through Simulation Hub for Technologies in Interdisciplinary Cyber Physical System (DRISHTI-CPS) based Technology Innovation Hub (TIH) at IIT Indore with a tentative cost of Rs. 100 crore in July 2020 News report
          • Award for Excellence in Teaching at IIT Indore in January 2019
            • Best Technology Development Award at IIT Indore in January 2019 (as part of the six member team) News report
              • An outstanding reviewer for Nanotechnology, IOP, 2017
                • German Academic Exchange Service (DAAD) scholarship to visit RWTH Aachen under Bilateral Exchange of Academics Program, June 2017
                  • Award for Excellence in Teaching at IIT Indore in January 2017
                    • Research article featured in the Lab Talk at nanotechweb.org entitled, “Transistor ‘imperfection’ leads towards perfection” in October 2016
                      • Award for Excellence in Teaching at IIT Indore in January 2015
                        • Paper entitled, “Performance assessment of nanoscale double and triple gate FinFETs” was selected in a collection of 25 research articles commemorating 25 years of Semiconductor Science and Technology, November 2011
                          • Recognized by Queen’s University Belfast, UK for highly valued contribution to university work, 2007
                            • Paper entitled, “Performance assessment of nanoscale double and triple gate FinFETs” selected in the Semiconductor Science and Technology (IOP) Annual Highlights Collection, 2006
                              • Paper entitled, “Design guidelines of vertical surrounding gate (VSG) MOSFETs for future ULSI circuit applications” selected as one of the outstanding papers submitted to IEEE Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems, USA, 2001
                                • Awarded Senior Research Fellowship by Council of Scientific and Industrial Research (CSIR), India, 2001

 


Invited talks and seminars:

    • A. Kranti, Effectiveness of TCAD in comprehending unusual characteristics of junctionless transistors, 11th International Conference on Microelectronics Circuits and Systems – Micro 2024, Delhi Technological University, India, May 2024
      • A. Kranti, Indian Semiconductor Mission – A transformative journey for Viksit Bharat, Indira Gandhi National Open University (IGNOU), New Delhi, March 2024
        • A. Kranti, Nanowire capacitorless DRAM with programmable transistors, UCLouvain, Belgium, June 2023
          • A. Kranti, Understanding parasitic capacitance of reconfigurable transistors for enhancing analog/RF metrics at low current levels, UCLouvain, Belgium, June 2023
            • A. Kranti, Understanding dynamic memory operation in Silicon nanotransistors through energy band diagrams, 2nd International Conference on Advanced Functional Materials and Devices (AFMD-2023), ARSD College, University of Delhi, March 2023
              • A. Kranti, Exploiting tunneling phenomenon for capacitorless 1T DRAM, Delhi Technological University, Delhi, India, January 2023
                • A. Kranti, Implications of atypical characteristics of junctionless transistors in the nanometer regime, ABV-IIITM, Gwalior, India, October 2022
                  • A. Kranti, The genesis of ‘vacuum’ nanotransistor, IEEE AP/MTT Joint Chapter Gujarat Section and IETE Ahmedabad Centre, India, September 2022
                    • A. Kranti, 1T-DRAM in the nanoscale regime: Physics, insights and optimization, Texas Global Virtual Exchange, The University of Texas at Austin, USA, March 2021
                      • A. Kranti, Unconventional characteristics in offbeat transistors: Revisiting our understanding of device physics and operation, IEEE Malaysia Section Sensors and Nanotechnology Council Chapter, October 2020
                        • A. Kranti and M. Gupta, Junctionless device cross-section: A key aspect for overcoming Boltzmann tyranny, 237th ECS Meeting, Symposium: H02 – Advanced CMOS-Compatible Semiconductor Devices, Montreal, Canada, May 10th-15th, 2020
                          • A. Kranti and M. Gupta, Can unipolar transistors exhibit strong bipolar features?, 5th International Symposium on Semiconductor Materials and Devices ISSMD -2018, Visvesvaraya National Institute of Technology (VNIT) Nagpur, India, 30th November – 2nd December 2018
                            • A. Kranti, Function without junction: Opportunities for steep switching devices, 6th International Symposium on Integrated Functionalities ISIF-2017, New Delhi, India, December 10th-13th, 2017
                              • A. Kranti, Exploiting unique attributes of junctionless transistors for low power applications, National Sun Yat-Sen University, Taiwan, October 2017
                                • A. Kranti, Steep switching characteristics and mobility extraction in junctionless transistors, Institut für Halbleitertechnik, RWTH Aachen, Germany, June 2017
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    Technical reviewer for international journals (publisher wise list)

      • IEEE (Transactions on Electron Devices; Transactions on Nanotechnology; Transactions on Microwave Theory and Techniques; Transactions on Circuits and Systems–I: Regular Papers; Transactions on Circuits and Systems–II: Express Briefs; Transactions on Device and Materials Reliability; Transactions on Semiconductor Manufacturing; Transactions on Very Large Scale Integration Systems; Transactions on Ultrasonics, Ferroelectrics, and Frequency Control; Electron Device Letters; Sensors Journal; Journal of Electron Device Society; Access)
        • Elsevier (Solid-State Electronics; Microelectronic Engineering; Microelectronics Reliability; Microelectronics Journal; Micro and Nanostructures (previously Superlattices and Microstructures); Physica E: Low-Dimensional Systems and Nanostructures; Vacuum; Surfaces and Interfaces; Materials Science in Semiconductor Processing; Materials Today Communications; Integration – The VLSI Journal; Nano Today; Memories – Materials, Devices, Circuits and Systems; Thin Solid Films)
          • IOP (Semiconductor Science and Technology; Nanotechnology; Journal of Physics D: Applied Physics; Physica Scripta; Journal of Physics: Condensed Matter; Neuromorphic Computing and Engineering; Engineering Research Express)
            • IET (Circuits, Devices and Systems; Electronics Letters; Micro and Nano Letters; Power Electronics)
              • ACS (Applied Electronic Materials)
                • RSC (Nanoscale, Nanoscale Horizons)
                  • Springer (Nanoscale Research Letters; Journal of Computational Electronics; Journal of Materials Science: Materials in Electronics; Silicon; Microsystem Technologies)
                    • AVS (Journal of Vacuum Science and Technology-B)
                      • Wiley (Physica Status Solidi (A), Advanced Materials Technologies, International Journal of Circuit Theory and Applications; International Journal of Numerical Modeling)
                        • ECS (Journal of Solid State Science and Technology)
                          • Springer Nature (Scientific Reports)

     


    Reviewer of research projects:

      • Science and Engineering Research Board, Department of Science and Technology, Government of India
        • Shastri Indo-Canadian Institute
          • Prime Minister’s Research Fellows (PMRF) Scheme, Government of India
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      Editorial responsibilities:

        • Member Editorial Board, Engineering Research Express, IOP
          • Associate Editor, Electronics Letters, IET
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